0.1 μm InP HEMT MMIC Fabrication on 100 mm Wafers for Low Cost, High Performance Millimeter-Wave Applications
نویسندگان
چکیده
Northrop Grumman Space Technology (NGST) has recently initiated process development for fabricating 0.1 μm InGaAs/InAlAs/InP High Electron Mobility Transistor (HEMT) MMICs on 100 mm InP substrates. Successful development of this process will further reduce costs for InP HEMT MMICs and rival those of GaAs-based HEMT MMICs, including GaAs-based metamorphic HEMT technology, with superior performance. Production capability has been demonstrated in three core areas: epitaxial material growth using Molecular Beam Epitaxy (MBE), frontside processing in NGST’s 100 mm MMIC production line, and backside processing in NGST’s 100 mm backside production line with final wafer thickness of 75 μm. In this paper, we will present recent data and progress on NGST’s 0.1 μm InP HEMT MMIC LNA process on 100 mm InP substrates.
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